The invention relates to an apparatus and method for detecting micro defects in semiconductors or silicon and particularly, but not exclusively, in part-processed or bulk silicon.
Developments in crystal growth have enabled the production of silicon wafers free from dislocation. However, dislocation free wafers may not be able to remain this way after the wafers are subjected to high temperature processing. Defects formed within the device active region in the wafer and defects produced in the gate oxide generally degrade device performance, lead to yield losses and reliability problems. This invention can be used to locate and measure the electrical activity of these defects.
Transition metals, which are fast diffusers in silicon, readily form deep levels, ie away from the valance or conduction band edge, and also lead to decoration of both point and extended defects which eventually lead to device failure. These transition metal impurities also form recombination centres and traps which can dramatically reduce carrier lifetime and can also act as dark current generation sites, i.e. in the absence of light, charge leakage will occur. Gettering techniques, where mechanical damage, such as abrasion, is typically undertaken in order to provide a damaged site, which effectively acts as a sponge soaking up impurities in the wafer, have been developed to remove transition metal impurities from the device active areas. It therefore follows that the aforementioned damage is deliberately targeted to an area in the wafer remote from the electrical device. Thus internal gettering techniques introduce defects in the silicon substrate which attract unwanted impurities away from the device areas. Gettering sites need to be characterised to control their distribution for different process conditions, a task which can be performed with the present invention.
Epitaxial silicon, that is the deposited uppermost layers of silicon, typically in the order of microns thick, has been used to overcome problems with as-grown CZ wafers. In other words, as the thickness in the epitaxial silicon increases, given that this layer can be grown in a defect-free manner, it can be used as a site for the electric device without fear of contamination in the bulk wafer affecting the activity of the device. However it is not always possible to use an epitaxial layer of sufficient thickness for this activity and where the epitaxial layer is thin then defects in the bulk wafer can interfere with the electrical device. Moreover, epitaxial layers suffer from problems of metal contamination.
Several techniques already exist for the detection of defects in as-grown material, these include wet chemical etching in order to reveal flow pattern defects; light scattering topography where the topography of the surface wafer is examined using light to detect undulations which in turn are indicative of defects in the sub-structure; and transmission interference contrast microscopy where the transmission of light through the wafer is examined and the phase shift due to small path changes is used to image defects in the wafer. All of these techniques are used to measure the physical presence of defects in the wafer. However they do not measure the electrical properties of the defects and moreover in some cases they are destructive. Accordingly, as techniques for determining the structural integrity of a wafer they are lacking in terms of the information they provide and moreover they can be positively destructive. Photoluminescence (PL) spectroscopy is a very sensitive technique for investigating both intrinsic and extrinsic electronic transitions at impurities and defects in semiconductors. When silicon is excited at low temperatures with laser irradiation above the band-gap of the material, electron hole pairs are produced. These carriers can recombine in various different ways, some of which give rise to luminescence. The electron hole pairs formed at low temperature can be trapped at impurities in silicon and they emit photons characteristic of this interaction, thereby giving impurity specific information in the photoluminescence spectra. There are a significant number of applications of PL spectroscopy to silicon including characterisation of silicon after different processing steps, characteristic of device fabrication for example implantation, oxidation, plasma etching, the detection of point defect complexes and the presence of dislocations. One of the most important applications includes the non-destructive measurement of shallow donors and acceptors such as arsenic, boron and phosphorous. Notably, this technique enables the measurement of the concentration of these shallow doners and acceptors. However, in all these applications in order to obtain this spectral information and unambiguous chemical identification of the optical centres, measurements need to be carried out at liquid helium temperatures. It is known throughout the industry that at room temperature the PL signal is significantly weakened and very little useful spectral information can be obtained.
We are aware of one set of experiments only which describe use of PL spectroscopy at room temperature (Mapping of Micro Defects in Silicon Crystals by Photoluminescence at Room Temperature; Semiconductor Silicon 1990, Proceedings Volume 90–7, pages 994–1004). Although this paper demonstrates both deep-level PL and band-edge PL are detectable in silicon wafers at room temperature it is of note that the technique used involved obtaining spectral information and so spatial resolution was constrained and the time involved was high. This effectively limits the successful use of this technology. This is unfortunate because room temperature PL is ideal for non-destructive examination of the recombination properties of defects.